Standard Cells in 3D¶

This page shows 3D visualizations of standard cells used by four different open source PDKs (ASAP7, nangate45, Skywater130, and Skywater130 High Density). Standard cells are the building blocks that the EDA software puts together to make a chip layout out of the SytemVerilog design you write.

The following are selected standard cells in the 7nm ASAP7 PDK. You can drag to rotate and scroll to zoom. To generate them from our Docker container, run:

make show_3d_cell              # show all available cells
make show_3d_cell CELL=NAND2x1 # show NAND2x1

NOT gate standard cell in ASAP7 — NOT gate (INVx1)

NAND gate standard cell in ASAP7 — NAND gate (NAND2x1)

ASAP7¶

Choose a cell to view in 3D

NanGate45¶

Choose a cell to view in 3D

Sky130¶

Choose a cell to view in 3D

Sky130HD¶

Choose a cell to view in 3D